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Annals of Computer Science and Information Systems, Volume 4

Proceedings of the E2LP 2014 Workshop

FPGA Verification Module


DOI: http://dx.doi.org/10.15439/2014F673

Citation: Proceedings of the E2LP 2014 Workshop, Vlado Sruk, Roman Szewczyk, Miodrag Temerinac (eds). ACSIS, Vol. 4, pages 912 ()

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Abstract. This paper addresses verification and debugging tool for development of FPGA modules. Proposed tool is developed for educational purposes in teaching students on Digital Design and VHDL programming language. Main goal of the debugging module is to get/set signal values while the FPGA board is running the module of interest. Two PicoBlaze CPUs are used in order to synchronize the input and output signals between PC and the FPGA. Debugging and verification tool is wrapped around the testing module, and it occupies 14\% of the Spartan 3 XC3S200 FPGA device. While using proposed tool, students are getting the knowledge about the PicoBlaze CPU, assembly language, FPGA, VHDL. When using proposed tool, students get deeper understanding of the hardware-software co-design concept. Finally, individual tasks are assigned to student workgroups. Some typical tasks are illustrated in this paper.