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Polish Information Processing Society
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Annals of Computer Science and Information Systems, Volume 11

Proceedings of the 2017 Federated Conference on Computer Science and Information Systems

Towards Programmable Address Spaces


DOI: http://dx.doi.org/10.15439/2017F217

Citation: Proceedings of the 2017 Federated Conference on Computer Science and Information Systems, M. Ganzha, L. Maciaszek, M. Paprzycki (eds). ACSIS, Vol. 11, pages 697700 ()

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Abstract. High-performance computing increasingly makes use of heterogeneous many-core parallelism. Individual processor cores within such systems are radically simpler than their predecessors; and tasks previously the responsibility of hardware, are delegated to software. Rather than use a cache, fast on-chip memory, is exposed through a handful of address space annotations; associating pointers with discrete sections of memory, within trivially distinct programming languages. Our work aims to improve the programmability of address spaces by exposing new functionality within the LLVM compiler, and then the existing template metaprogramming system of C++. This is achieved firstly via a new LLVM attribute, ext\_address\_space which facilitates integration with the non-type template parameters of C++. We also present a type traits API which encapsulates the address space annotations, to allow execution on both conventional and extended C++ compilers; and illustrate its applicability to OpenCL 2.x.


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